Jinshui Miao

2D Materials

 

Shanghai Institute of Technical Physics, Chinese Academy of Sciences

 

Email: jsmiao@mail.sitp.ac.cn

 

Biography

      Jinshui Miao joined Shanghai Institute of Technical Physics, Chinese Academy of Sciences (SITP-CAS) as a professor in 2020. Before joining SITP-CAS, he was a postdoctoral researcher at the Electrical and Systems Engineering of the University of Pennsylvania working with Professor Deep M. Jariwala since 2018. Jinshui Miao received his Ph.D. in Electrical Engineering from Michigan State University in May 2018 under supervision of Professor Chuan Wang. Jinshui Miao received his B.S. in Applied Physics and M.S. in Condensed Matter Physics from Shandong University (2011) and University of Chinese Academy of Sciences (2014, advisor: Weida Hu), respectively. He has published more than 50 papers with citations of > 2000 (Google Scholar) since 2014. He served as an associate editor of IEEE Open Journal of Nanotechnology, co-chair of 2018/2019 IEEE international conference on nanotechnology, guest editors of IOP Nanotechnology and Frontiers in Physics, and journal reviewers of many SCI journals. His current research areas including bio-inspired infrared vision devices and chips, flexible infrared photodetectors, neural network infrared vision sensors, etc. 

 

Abstract for Presentation

Low-power logic devices from two-dimensional heterostructures
 

 

  Low-power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling (BTBT) of charges and exhibit steep subthreshold slope (SS) transfer characteristics are an attractive option in this regard. However, current generation of silicon and Ⅲ-V heterojunction based TFETs while suffer from low on-current density and on/off current ratios for sub-60 mV per decade operation. Semiconducting two-dimensional (2D) materials have recently renewed enthusiasm in novel device design for TFETs not only because of their atomically thin bodies that favor superior electrostatic control, but the same feature also favors higher on-current density and consequently high on/off ratio. Here, we demonstrate gate-tunable heterojunction diodes (triodes) fabricated from metal 2D/3D van der Waals heterostructures, with a sub-60 mv per decade SS and an average SS of 34 mV/decade over 4 decades of drain current. Further, the devices show a large current on/off ratio of approximately 106 and on-state current density of 0.3 µA/µm at a drain bias of -1V. Our work opens new avenues for 2D semiconductors for 3D hetero integration with silicon to achieve ultra-low power logic devices.